Plan 9 from Bell Labs’s /usr/web/sources/extra/9hist/power/mem.h

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## diffname power/mem.h 1990/0227
## diff -e /dev/null /n/bootesdump/1990/0227/sys/src/9/mips/mem.h
0a
/*
 * Memory and machine-specific definitions.  Used in C and assembler.
 */

/*
 * Sizes
 */

#define	BI2BY		8			/* bits per byte */
#define BI2WD		32			/* bits per word */
#define	BY2WD		4			/* bytes per word */
#define	BY2PG		4096			/* bytes per page */
#define	WD2PG		(BY2PG/BY2WD)		/* words per page */
#define	PGSHIFT		12			/* log(BY2PG) */
#define	MS2HZ		50			/* millisec per clock tick */

#define	MAXMACH		4			/* max # cpus system can run */

/*
 * CP0 registers
 */

#define INDEX		0
#define RANDOM		1
#define TLBPHYS		2
#define CONTEXT		4
#define BADVADDR	8
#define TLBVIRT		10
#define STATUS		12
#define CAUSE		13
#define EPC		14
#define	PRID		15

/*
 * M(STATUS) bits
 */
#define IEC		0x00000001
#define KUC		0x00000002
#define IEP		0x00000004
#define KUP		0x00000008
#define INTMASK		0x0000ff00
#define SW0		0x00000100
#define SW1		0x00000200
#define INTR0		0x00000400
#define INTR1		0x00000800
#define INTR2		0x00001000
#define INTR3		0x00002000
#define INTR4		0x00004000
#define INTR5		0x00008000
#define ISC		0x00010000
#define SWC		0x00020000
#define CU1		0x20000000

/*
 * Traps
 */

#define	UTLBMISS	(KSEG0+0x00)
#define	EXCEPTION	(KSEG0+0x80)

/*
 * Magic registers
 */

#define	MACH		25		/* R25 is m-> */
#define	USER		24		/* R24 is u-> */
#define	MPID		0xBF000000	/* long; low 3 bits identify mp bus slot */
#define WBFLUSH		0xBC000000	/* D-CACHE data; used for write buffer flush */

/*
 * Fundamental addresses
 */

#define	MACHADDR	0x80014000
#define	USERADDR	0xC0000000
#define	UREGADDR	(USERADDR+BY2PG-4-0xA0)
/*
 * MMU
 */

#define	KUSEG	0x00000000
#define KSEG0	0x80000000
#define KSEG1	0xA0000000
#define	KSEG2	0xC0000000
#define	KSEGM	0xE0000000	/* mask to check which seg */

#define	PTEGLOBL	(1<<8)
#define	PTEVALID	(1<<9)
#define	PTEWRITE	(1<<10)
#define	PTEPID(n)	((n)<<6)

#define	NTLBPID	64	/* number of pids */
#define	NTLB	64	/* number of entries */
#define	TLBROFF	8	/* offset of first randomly indexed entry */

/*
 * Address spaces
 */

#define	UZERO	KUSEG			/* base of user address space */
#define	UTZERO	(UZERO+BY2PG)		/* first address in user text */
#define	USTKTOP	KZERO			/* byte just beyond user stack */
#define	TSTKTOP	(USERADDR+100*BY2PG)	/* top of temporary stack */
#define	KZERO	KSEG0			/* base of kernel address space */
#define	KTZERO	(KSEG0+0x20000)		/* first address in kernel text */

/*
 * Exception codes
 */
#define	CINT	 0		/* external interrupt */
#define	CTLBM	 1		/* TLB modification */
#define	CTLBL	 2		/* TLB miss (load or fetch) */
#define	CTLBS	 3		/* TLB miss (store) */
#define	CADREL	 4		/* address error (load or fetch) */
#define	CADRES	 5		/* address error (store) */
#define	CBUSI	 6		/* bus error (fetch) */
#define	CBUSD	 7		/* bus error (data load or store) */
#define	CSYS	 8		/* system call */
#define	CBRK	 9		/* breakpoint */
#define	CRES	10		/* reserved instruction */
#define	CCPU	11		/* coprocessor unusable */
#define	COVF	12		/* arithmetic overflow */
#define	CUNK13	13		/* undefined 13 */
#define	CUNK14	14		/* undefined 14 */
#define	CUNK15	15		/* undefined 15 */

#define	NSEG	5
.
## diffname power/mem.h 1990/0614
## diff -e /n/bootesdump/1990/0227/sys/src/9/mips/mem.h /n/bootesdump/1990/0614/sys/src/9/mips/mem.h
17a

/*
 * Time
 */
#define	MS2HZ		50			/* millisec per clock tick */
#define	TK2SEC(t)	((t)/20)		/* ticks to seconds */
#define	TK2MS(t)	((t)*MS2HZ)		/* ticks to milliseconds */
#define	MS2TK(t)	((t)/MS2HZ)		/* milliseconds to ticks */
.
15d
## diffname power/mem.h 1990/0821
## diff -e /n/bootesdump/1990/0614/sys/src/9/mips/mem.h /n/bootesdump/1990/0821/sys/src/9/mips/mem.h
113c
#define	USTACKSIZE	(4*1024*1024)	/* size of user stack */
.
## diffname power/mem.h 1990/0907
## diff -e /n/bootesdump/1990/0821/sys/src/9/mips/mem.h /n/bootesdump/1990/0907/sys/src/9/mips/mem.h
112c
#define	KTZERO	(KZERO+0x20000)		/* first address in kernel text */
.
## diffname power/mem.h 1990/1212
## diff -e /n/bootesdump/1990/0907/sys/src/9/mips/mem.h /n/bootesdump/1990/1212/sys/src/9/mips/mem.h
96a
#define PTERONLY	0
.
## diffname power/mem.h 1991/0407
## diff -e /n/bootesdump/1991/0201/sys/src/9/mips/mem.h /n/bootesdump/1991/0407/sys/src/9/power/mem.h
135a

#define isphys(x) ((ulong)(x) & KZERO)
.
## diffname power/mem.h 1991/0425
## diff -e /n/bootesdump/1991/0407/sys/src/9/power/mem.h /n/bootesdump/1991/0425/sys/src/9/power/mem.h
98a
#define TLBPID(n)	(((n)>>6)&0x3F)

/* N.B. MUST CHANGE l.s utlbmiss if you want to change this */
#define STLBLOG		13
#define STLBSIZE	(1<<STLBLOG)
.
## diffname power/mem.h 1991/0501
## diff -e /n/bootesdump/1991/0425/sys/src/9/power/mem.h /n/bootesdump/1991/0501/sys/src/9/power/mem.h
102c
#define STLBLOG		11
.
## diffname power/mem.h 1991/0523
## diff -e /n/bootesdump/1991/0501/sys/src/9/power/mem.h /n/bootesdump/1991/0523/sys/src/9/power/mem.h
116c
#define	TSTKTOP	(USERADDR+TSTKSIZ*BY2PG)/* top of temporary stack */
#define TSTKSIZ 100
.
## diffname power/mem.h 1991/0605
## diff -e /n/bootesdump/1991/0523/sys/src/9/power/mem.h /n/bootesdump/1991/0605/sys/src/9/power/mem.h
140,141d
113,120c
#define	UZERO		KUSEG			/* base of user address space */
#define	UTZERO		(UZERO+BY2PG)		/* first address in user text */
#define	USTKTOP		KZERO			/* byte just beyond user stack */
#define	TSTKTOP		(USERADDR+TSTKSIZ*BY2PG)/* top of temporary stack */
#define TSTKSIZ 	100
#define	KZERO		KSEG0			/* base of kernel address space */
#define	KTZERO		(KZERO+0x20000)		/* first address in kernel text */
#define	USTKSIZE	(4*1024*1024)		/* size of user stack */
#define LKSEGSIZE	(25*BY2PG)
#define LKSEGBASE	(USTKTOP-USTKSIZE-LKSEGSIZE)	
.
101d
## diffname power/mem.h 1991/0606
## diff -e /n/bootesdump/1991/0605/sys/src/9/power/mem.h /n/bootesdump/1991/0606/sys/src/9/power/mem.h
96a
#define PTEUNCACHE	(1<<11)
.
20a
#define HZ		20
.
14a
#define PGROUND(s)	(((s)+(BY2PG-1))&~(BY2PG-1))
.
## diffname power/mem.h 1991/0607
## diff -e /n/bootesdump/1991/0606/sys/src/9/power/mem.h /n/bootesdump/1991/0607/sys/src/9/power/mem.h
99c
#define PTEUNCACHED	(1<<11)
.
## diffname power/mem.h 1991/0705
## diff -e /n/bootesdump/1991/0607/sys/src/9/power/mem.h /n/bootesdump/1991/0705/sys/src/9/power/mem.h
118c
#define	TSTKTOP		(USERADDR+USTKSIZE)	/* top of temporary stack */
.
106a
#define SEGMAPSIZE	64

.
103c
#define PTEMAPMEM	(1024*1024)	
#define	PTEPERTAB	(PTEMAPMEM/BY2PG)
.
15a
#define ICACHESIZE	(64*1024)		/* Power series */
.
## diffname power/mem.h 1991/0711
## diff -e /n/bootesdump/1991/0705/sys/src/9/power/mem.h /n/bootesdump/1991/0711/sys/src/9/power/mem.h
106c
#define STLBLOG		13
.
## diffname power/mem.h 1992/0622
## diff -e /n/bootesdump/1991/0711/sys/src/9/power/mem.h /n/bootesdump/1992/0622/sys/src/9/power/mem.h
16a
#define MB		(1024*1024)
.
## diffname power/mem.h 1992/0726
## diff -e /n/bootesdump/1992/0622/sys/src/9/power/mem.h /n/bootesdump/1992/0726/sys/src/9/power/mem.h
17d
## diffname power/mem.h 1992/0828
## diff -e /n/bootesdump/1992/0726/sys/src/9/power/mem.h /n/bootesdump/1992/0828/sys/src/9/power/mem.h
104c
#define PTEMAPMEM	(2*1024*1024)	
.
## diffname power/mem.h 1992/0923
## diff -e /n/bootesdump/1992/0828/sys/src/9/power/mem.h /n/bootesdump/1992/0923/sys/src/9/power/mem.h
123c
#define TSTKSIZ 	500
.
## diffname power/mem.h 1993/0422
## diff -e /n/bootesdump/1992/0923/sys/src/9/power/mem.h /n/bootesdump/1993/0422/sys/src/9/power/mem.h
23,25c
#define HZ		100
#define	MS2HZ		(1000/HZ)		/* millisec per clock tick */
#define	TK2SEC(t)	((t)/HZ)		/* ticks to seconds */
.
## diffname power/mem.h 1993/0501
## diff -e /n/bootesdump/1993/0422/sys/src/9/power/mem.h /n/fornaxdump/1993/0501/sys/src/brazil/power/mem.h
122c
#define	TSTKTOP		(0xC0000000+USTKSIZE)	/* top of temporary stack */
.
96a
#define KSTACK		4096	/* Size of kernel stack */

.
85,86d
79a
#define UREGSIZE	0xA0		/* Sizeof(Ureg)+space for retpc & ur */
.
76,78c
#define	USER		24		/* R24 is up-> */
#define	MPID		0xBF000000	/* long; low 3 bits mp bus slot */
#define WBFLUSH		0xBC000000	/* D-CACHE data; write buffer flush */
.
23,25c
#define HZ		20
#define	MS2HZ		50			/* millisec per clock tick */
#define	TK2SEC(t)	((t)/20)		/* ticks to seconds */
.
## diffname power/mem.h 1993/0818
## diff -e /n/fornaxdump/1993/0501/sys/src/brazil/power/mem.h /n/fornaxdump/1993/0818/sys/src/brazil/power/mem.h
115a
#define NCOLOR	1
#define getcolor(a)	0
.
## diffname power/mem.h 1993/1008
## diff -e /n/fornaxdump/1993/0818/sys/src/brazil/power/mem.h /n/fornaxdump/1993/1008/sys/src/brazil/power/mem.h
117c
#define getpgcolor(a) 0

.
## diffname power/mem.h 1994/0208
## diff -e /n/fornaxdump/1993/1008/sys/src/brazil/power/mem.h /n/fornaxdump/1994/0208/sys/src/brazil/power/mem.h
132a
#define globalmem(x)	(((ulong)x)&KZERO)	/* addresses valid in all contexts */
.
## diffname power/mem.h 1994/0405
## diff -e /n/fornaxdump/1994/0208/sys/src/brazil/power/mem.h /n/fornaxdump/1994/0405/sys/src/brazil/power/mem.h
15c
#define ROUND(s, sz)	(((s)+(sz-1))&~(sz-1))
#define PGROUND(s)	ROUND(s, BY2PG)
.
11a
#define	BY2V		8			/* bytes per very long word */
.
## diffname power/mem.h 1995/0108
## diff -e /n/fornaxdump/1994/0405/sys/src/brazil/power/mem.h /n/fornaxdump/1995/0108/sys/src/brazil/power/mem.h
49c
#define IE		0x00000001
.
## diffname power/mem.h 1995/02021
## diff -e /n/fornaxdump/1995/0108/sys/src/brazil/power/mem.h /n/fornaxdump/1995/02021/sys/src/brazil/power/mem.h
63a
#define CM		0x00080000
#define PE		0x00100000
.
52a
#define IEO		0x00000010
#define KUO		0x00000020
.
## diffname power/mem.h 1997/0327 # deleted
## diff -e /n/fornaxdump/1995/02021/sys/src/brazil/power/mem.h /n/emeliedump/1997/0327/sys/src/brazil/power/mem.h
1,160d

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