Plan 9 from Bell Labs’s /usr/web/sources/contrib/stallion/root/arm/go/src/runtime/duff_mips64x.s

Copyright © 2021 Plan 9 Foundation.
Distributed under the MIT License.
Download the Plan 9 distribution.


// Code generated by mkduff.go; DO NOT EDIT.
// Run go generate from src/runtime to update.
// See mkduff.go for comments.

// +build mips64 mips64le

#include "textflag.h"

TEXT runtime·duffzero(SB), NOSPLIT|NOFRAME, $0-0
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	MOVV	R0, 8(R1)
	ADDV	$8, R1
	RET

// TODO: Implement runtime·duffcopy.
TEXT runtime·duffcopy(SB),NOSPLIT|NOFRAME,$0-0
	MOVV	R0, 2(R0)
	RET

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